Project Trellis
UnknownMaps the architecture and configuration bitstream of Lattice ECP5 FPGAs, supplying device information and tools for independent FPGA development.
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About and scope
Project Trellis studies the ECP5 bitstream and internal architecture using an experimental documentation process. Its tools and device database connect that research to an open FPGA development flow. The effort has a specific ECP5 scope, distinct from IceStorm's iCE40 research.
Contribution availability
Contribution policy unknown
- AI-assisted contribution policy
- Unspecified
Reported progress
Progress not reported